09 - Logic circuits

5 Pages • 1,243 Words • PDF • 393.3 KB
Uploaded at 2021-09-24 18:25

This document was submitted by our user and they confirm that they have the consent to share it. Assuming that you are writer or own the copyright of this document, report to us by using this DMCA report button.

Logic circuits. Logic gates and flip-flops 1. Objectives The aim of the exercise is to: - get to know basic logic gates, - determination of the characteristics and propagation time of the NAND gate, - get acquainted with flip-flops and decoders, - to test a simple phase detector.

2. Theory 2.1. Logic circuits One of the basic logic gates used in digital technology is the NAND gate. The truth table for a two-input NAND gate is shown below (x - inputs, y - output): Table 1. NAND gate. x1 0 0 1 1

x2 0 1 0 1

y 1 1 1 0 Figure 1. 7400 - Quad 2 - inputs NAND gates

The 7400 integrated transistor TTL (Transistor Transistor Logic) chip inside of its structure contains 4 NAND gates - Fig. 1. The second, combined, integrated circuit used in the exercise is 7486 - contains four twowire EX-OR gates (Figure 2). The truth table for a single EX-OR gate: Table 2. EX-OR gate. x1 0 0 1 1

x2 0 1 0 1

y 0 1 1 0 Figure 2. 7486 - Quad 2 - inputs EX-OR gates

The digital sequencing systems studied in the exercise are D-type flip-flops included in the 4013 (Figure 3). This system, unlike the others, is made in CMOS technology.


Figure 3. 4013 - dual D flip-flop

The action of the flip-flop D is described in the truth table: Table 3. D flip-flop truth table. Clk*






0 1

0 0

0 0

0 1

1 0






0 0 1 1 1 1 care case

1 0 1

x x 1 x x 0 x x 1 * = level change, x = don't

As long as the asynchronous inputs are not in high state, the flip-flop determines the state of input D at output Q during the rising edge at the CLK clock input. The falling edge of the CLK signal does not change the status of the flip-flop - the chip remembers the previous state. The flip-flop, as a memory element, is the basic element of the counter. The modulo 2 counter can be obtained from the D flip-flop by combining its output Q with the D input. The characteristic of such a system is that the output frequency is twice lower than the input frequency.


3. Components and instrumentation. Figure 4. shows a diagram of the didactic module for studying the properties of digital logic circuits.

Figure 4. Schematic of module

4. Tasks 4.1. Determination of transition characteristics of the NAND gate Use the J1 jumper to connect the generator input to the 7400. Instead of Gen_1 connect the DC power adapter. Power the model with a suitable voltage (description will be on the model). Connect the voltmeter to the P1 output - measure the output voltage at the NAND gate. By changing the input voltage between 0-5 V note the output voltage. Clear the transient characteristics: U out  f U in  . Comment on the received shape of the characteristics.

4.2. Determination of gate propagation time To Gen_1 input connect a rectangular signal generator with 5 V amplitude and minimum voltage Umin = 0 V (set accordingly offset!). Set the signal to 50% and the frequency to about 100 kHz. Set J2 jumper into position so that the 13 output of the 7400 is high state. In this jumper position, four gates are connected in series. Connect the oscilloscope: CH1 parallel to the Gen_1 input and CH2 to the P2 output (Figure 5). Use cursors to measure the propagation time of the four NAND gates, as a reference point select the location where the signal reaches 50% of its amplitude.


Figure 5. Schematic for time propagation measurement

To obtain a result for a single gate, divide the result by 4. Check the propagation time value for the value from catalogue, given the range of the used gates.

4.3. Observation of the hazard phenomenon Without changing the generator setting, switch jumper J2 as shown in figure 6.

Figure 6. Schematic for hazard phenomena observation

Before proceeding to the measurements, it is necessary to check the logic state on the output of the circuit, based on the truth table of the NAND gate. Verify your assumptions with the oscilloscope measurements. Note and comment the received waveform at the output of the circuit.

4.4. Observation of the operation of the sequential system Set jumper J1 to center position so that the signal from the generator is fed to the first input of the flip-flop (Figure 7). Leave the signal shape and amplitude level as in point 2. Set the signal frequency to about 1 kHz. Connect one of the oscilloscope channels parallel to the generator, and connect the other channel to the output of the individual flip-flops - the counting coils. Record the signal frequencies at outputs: JQ1  JQ4.

Figure 7. 4 - bit counter 4

Reduce the frequency to about 1 Hz. Observe the operation of the seven-segment LED display and four LEDs (DL1  DL4). Results note in the table. Table 4. LED and 7 th segments display. No. 1 2 ... 16

LD4 0 0

LD3 0 0

LD2 0 0

LD1 0 1





7 seg. display

Check the operation of Set and Reset asynchronous inputs (S_R and S_Set). With disconnected generator check the operation of Dt4  Dt1 buttons.

4.5. Phase measurement using the EX-OR gate Set J1 jumper to the extreme position, so that the signal from the generator is fed to the comparator (LM311). To the second input (Gen_2) connect the signal from the second channel of the generator. For both channels, set the same frequency from 1  10 kHz. a) Amplitude of signals should be as in point 2. Signal shape: rectangle. Connect two channels of the oscilloscope to the P4 output, observing the signals on both outputs of the comparator. By changing the 2signal phase, observe the waveforms at the comparator outputs and directly at the output of the EX-Or gate (P5). Write down observations. b) Reduce the amplitude of the input signals (up to about 500 mV) and set the sinusoidal shape of the generated wave. Set offset = 0 V. Observe the output signals of the comparators and the EX-OR gate when changing the phase of the signal in channel 2. Note the conclusions. c) Connect the voltmeter to the P5 output - after the low-pass filter. When setting the generator as in the previous point, change phase of signal 2 to 1, plot the characteristics of the ph meter: U  f ( ) , phase change to the full extent possible. Is the system able to distinguish in which channel the phase changes?

5. Readings [1] U. Tietze, Ch. Schenk: Electronic Circuits. Handbook for Design and Applications, 2nd edition, 2008 [2] P. Horowitz, W. Hill: The Art of Electronics [3] R. L. Boylestad: Introductory Circuit Analysis (11th Edition), [4] J. David Irwin, R. Mark Nelms: Basic engineering circuit analysis (10 th edition)

6. Problems 1. What is the difference between a combination and sequential circuit? 2. What is the margin of distortion? 3. How can you make a counter using D and JK type flip-flops? 4. What is the use of asynchronous inputs in meters? 5. Given 4 data lines (4 bits), write the equation for any segment of the seven segment display.

09 - Logic circuits

Related documents

5 Pages • 1,243 Words • PDF • 393.3 KB

14 Pages • 1,746 Words • PDF • 232.3 KB

1 Pages • 1,138 Words • PDF • 634.9 KB

207 Pages • PDF • 39.3 MB

1 Pages • 745 Words • PDF • 49.7 KB

32 Pages • 1,165 Words • PDF • 2.1 MB

5 Pages • 951 Words • PDF • 174.6 KB

10 Pages • 634 Words • PDF • 1 MB

224 Pages • 100,157 Words • PDF • 33.5 MB

3 Pages • 2,344 Words • PDF • 103.2 KB

17 Pages • 5,897 Words • PDF • 539.8 KB

6 Pages • 1,955 Words • PDF • 676.8 KB